1. Field of the Invention
The present invention relates to apparatus provided with a field effect transistor (hereinafter referred to as an FET) or FETs.
2. Description of the Prior Art
Heretofore there have been proposed a variety of apparatus having an FET or FETs constituted using non-single crystal semiconductor layers, in particular, amorphous semiconductor layers.
The amorphous semiconductor layer can be easily formed on a required substrate at a temperature lower than in the case of forming a single crystal semiconductor layer. Accordingly, an FET employing the amorphous semiconductor layers can be manufactured with more ease than in the case of producing an FET using the single crystal semiconductor layers.
In the conventional FET utilizing the amorphous semiconductors, however, amorphous semiconductor layers constituting the source and drain, respectively, and a semiamorphous semiconductor layer forming the channel region are usually arranged on the substrate in a direction of its plane. For this reason, the length of the channel region, i.e. the channel length between the source and drain depends on the length of the amorphous semiconductor layer in the direction of the plane of the substrate forming the channel region between the amorphous semiconductor layers forming the source and drain, respectively. The channel length can be reduced by forming the amorphous semiconductor layers so that the length of the former layer may be small in the direction of its plane between the latter layers, or that the distance may be small between the opposing sides surfaces of the latter layers. However, there is a certain limit to the formation of the amorphous semiconductor layer or layers so that the channel length may be sufficiently small.
For the abovesaid reason, the prior art FET employing the amorphous semiconductor layers has the defects of limitations on obtaining the FET function with high efficiency at high speed, the necessity of using a bias power source which produces a high voltage, etc.
Furtheremore, there has heretofore been attempted to obtain, for example, electrical picture information from an input optical image by the use of apparatus in which a lot of FETs employing the amorphous semiconductor are arranged in a matrix form. But the conventional apparatus possesss the shortcomings that they are complex and bulky and very difficult to manufacture.
There has also been attempted in the past to obtain, for instance, a memory circuit using apparatus in which a number of FETs employing the amorphous semiconductor layers, each having connected thereto a capacitance element for storage use, are arranged in a matrix form. But these apparatus also have the same drawbacks as mentioned above.